A Hardware-assisted Instruction Security Monitoring Design in Embedded System

This paper presents a series of novel architectural-enhanced security solutions. In the crosscompilation link stage, the automated compiler extracts the intrusion model for instruction code and static data, meanwhile secure tags of each main memory segment are added at the compile time automatically. At runtime, the designed hardware observes its dynamic execution trace and checks whether the trace conforms to the permissible behavior and trigger appropriate response mechanisms. The proposed methods don’t change the compiler or the existing instruction set and imposes no special restriction to the software developer. The hardware structure of protection design is implemented on an actual OR1200FPGA platform. The experimental analysis shows that the proposed techniques can prevent a wide range of common software and physical attacks with minimal resource cost and low performance consumption.